package ti.lang; /** * PAPI counter library. The available counters are platform dependent. * It has been tested on the sequential and smp backend. There is a know * problem on the smp backend. When TI_PFORP is set with m/n, where m > n, * there is a race condition in the PAPI start method. This problem does * not occur when m = n */ public class PAPICounter{ private long accumulated_counter; private long counterid; private int event; private int ownerid; private int state; private static final int IDLE = 0; private static final int RUNNING = 1; /** * PAPI constants for preset events */ private static final int base = 0xF0000000; public static final int PAPI_L1_DCM = base + 0x0000; public static final int PAPI_L1_ICM = base + 0x0001; public static final int PAPI_L2_DCM = base + 0x0002; public static final int PAPI_L2_ICM = base + 0x0003; public static final int PAPI_L3_DCM = base + 0x0004; public static final int PAPI_L3_ICM = base + 0x0005; public static final int PAPI_L1_TCM = base + 0x0006; public static final int PAPI_L2_TCM = base + 0x0007; public static final int PAPI_L3_TCM = base + 0x0008; public static final int PAPI_CA_SNP = base + 0x0009; public static final int PAPI_CA_SHR = base + 0x000a; public static final int PAPI_CA_CLN = base + 0x000b; public static final int PAPI_CA_INV = base + 0x000c; public static final int PAPI_CA_ITV = base + 0x000d; public static final int PAPI_L3_LDM = base + 0x000e; public static final int PAPI_L3_STM = base + 0x000f; public static final int PAPI_BRU_IDL = base + 0x0010; public static final int PAPI_FXU_IDL = base + 0x0011; public static final int PAPI_FPU_IDL = base + 0x0012; public static final int PAPI_LSU_IDL = base + 0x0013; public static final int PAPI_TLB_DM = base + 0x0014; public static final int PAPI_TLB_IM = base + 0x0015; public static final int PAPI_TLB_TL = base + 0x0016; public static final int PAPI_L1_LDM = base + 0x0017; public static final int PAPI_L1_STM = base + 0x0018; public static final int PAPI_L2_LDM = base + 0x0019; public static final int PAPI_L2_STM = base + 0x001a; public static final int PAPI_BTAC_M = base + 0x001b; public static final int PAPI_PRF_DM = base + 0x001c; public static final int PAPI_L3_DCH = base + 0x001d; public static final int PAPI_TLB_SD = base + 0x001e; public static final int PAPI_CSR_FAL = base + 0x001f; public static final int PAPI_CSR_SUC = base + 0x0020; public static final int PAPI_CSR_TOT = base + 0x0021; public static final int PAPI_MEM_SCY = base + 0x0022; public static final int PAPI_MEM_RCY = base + 0x0023; public static final int PAPI_MEM_WCY = base + 0x0024; public static final int PAPI_STL_ICY = base + 0x0025; public static final int PAPI_FUL_ICY = base + 0x0026; public static final int PAPI_STL_CCY = base + 0x0027; public static final int PAPI_FUL_CCY = base + 0x0028; public static final int PAPI_HW_INT = base + 0x0029; public static final int PAPI_BR_UCN = base + 0x002a; public static final int PAPI_BR_CN = base + 0x002b; public static final int PAPI_BR_TKN = base + 0x002c; public static final int PAPI_BR_NTK = base + 0x002d; public static final int PAPI_BR_MSP = base + 0x002e; public static final int PAPI_BR_PRC = base + 0x002f; public static final int PAPI_FMA_INS = base + 0x0030; public static final int PAPI_TOT_IIS = base + 0x0031; public static final int PAPI_TOT_INS = base + 0x0032; public static final int PAPI_INT_INS = base + 0x0033; public static final int PAPI_FP_INS = base + 0x0034; public static final int PAPI_LD_INS = base + 0x0035; public static final int PAPI_SR_INS = base + 0x0036; public static final int PAPI_BR_INS = base + 0x0037; public static final int PAPI_VEC_INS = base + 0x0038; public static final int PAPI_RES_STL = base + 0x0039; public static final int PAPI_FP_STAL = base + 0x003a; public static final int PAPI_TOT_CYC = base + 0x003b; public static final int PAPI_LST_INS = base + 0x003c; public static final int PAPI_SYC_INS = base + 0x003d; public static final int PAPI_L1_DCH = base + 0x003e; public static final int PAPI_L2_DCH = base + 0x003f; public static final int PAPI_L1_DCA = base + 0x0040; public static final int PAPI_L2_DCA = base + 0x0041; public static final int PAPI_L3_DCA = base + 0x0042; public static final int PAPI_L1_DCR = base + 0x0043; public static final int PAPI_L2_DCR = base + 0x0044; public static final int PAPI_L3_DCR = base + 0x0045; public static final int PAPI_L1_DCW = base + 0x0046; public static final int PAPI_L2_DCW = base + 0x0047; public static final int PAPI_L3_DCW = base + 0x0048; public static final int PAPI_L1_ICH = base + 0x0049; public static final int PAPI_L2_ICH = base + 0x004a; public static final int PAPI_L3_ICH = base + 0x004b; public static final int PAPI_L1_ICA = base + 0x004c; public static final int PAPI_L2_ICA = base + 0x004d; public static final int PAPI_L3_ICA = base + 0x004e; public static final int PAPI_L1_ICR = base + 0x004f; public static final int PAPI_L2_ICR = base + 0x0050; public static final int PAPI_L3_ICR = base + 0x0051; public static final int PAPI_L1_ICW = base + 0x0052; public static final int PAPI_L2_ICW = base + 0x0053; public static final int PAPI_L3_ICW = base + 0x0054; public static final int PAPI_L1_TCH = base + 0x0055; public static final int PAPI_L2_TCH = base + 0x0056; public static final int PAPI_L3_TCH = base + 0x0057; public static final int PAPI_L1_TCA = base + 0x0058; public static final int PAPI_L2_TCA = base + 0x0059; public static final int PAPI_L3_TCA = base + 0x005a; public static final int PAPI_L1_TCR = base + 0x005b; public static final int PAPI_L2_TCR = base + 0x005c; public static final int PAPI_L3_TCR = base + 0x005d; public static final int PAPI_L1_TCW = base + 0x005e; public static final int PAPI_L2_TCW = base + 0x005f; public static final int PAPI_L3_TCW = base + 0x0060; public static final int PAPI_FML_INS = base + 0x0061; public static final int PAPI_FAD_INS = base + 0x0062; public static final int PAPI_FDV_INS = base + 0x0063; public static final int PAPI_FSQ_INS = base + 0x0064; public static final int PAPI_FNV_INS = base + 0x0065; public static final int PAPI_FP_OPS = base + 0x0066;/* PAPI3 only */ /* PAPI_FLOPS and PAPI_IPS removed in 2.745 */ public static final int L1_DataCache_Misses = PAPI_L1_DCM ; public static final int L1_ICache_Misses = PAPI_L1_ICM ; public static final int L2_DataCache_Misses = PAPI_L2_DCM ; public static final int L2_ICache_Misses = PAPI_L2_ICM ; public static final int L3_DataCache_Misses = PAPI_L3_DCM ; public static final int L3_ICache_Misses = PAPI_L3_ICM ; public static final int L1_TotalCache_Misses = PAPI_L1_TCM ; public static final int L2_TotalCache_Misses = PAPI_L2_TCM ; public static final int L3_TotalCache_Misses = PAPI_L3_TCM ; // PAPI_CA_SNP // PAPI_CA_SHR // PAPI_CA_CLN // PAPI_CA_INV // PAPI_CA_ITV // PAPI_L3_LDM // PAPI_L3_STM public static final int Branch_Unit_Idle = PAPI_BRU_IDL ; public static final int Integer_Unit_Idle = PAPI_FXU_IDL ; public static final int Float_Unit_Idle = PAPI_FPU_IDL ; public static final int LoadStore_Unit_Idle = PAPI_LSU_IDL ; public static final int DataTLB_Misses = PAPI_TLB_DM ; public static final int ITLB_Misses = PAPI_TLB_IM ; public static final int Total_TLB_Misses = PAPI_TLB_TL ; public static final int L1_Load_Misses = PAPI_L1_LDM ; public static final int L1_Store_Misses = PAPI_L1_STM ; public static final int L2_Load_Misses = PAPI_L2_LDM ; public static final int L2_Store_Misses = PAPI_L2_STM ; public static final int Data_Prefetch_Cache_Misses = PAPI_BTAC_M ; public static final int L3_DataCache_Hits = PAPI_PRF_DM ; // PAPI_L3_DCH // PAPI_TLB_SD // PAPI_CSR_FAL // PAPI_CSR_SUC // PAPI_CSR_TOT public static final int Memory_Access_Stall = PAPI_MEM_SCY ; public static final int Memory_Read_Stall = PAPI_MEM_RCY ; public static final int Memory_Write_Stall = PAPI_MEM_WCY ; public static final int No_Instruction_Issued = PAPI_STL_ICY ; // PAPI_FUL_ICY public static final int No_Instruction_Completed = PAPI_STL_CCY ; // PAPI_FUL_CCY // PAPI_HW_INT // PAPI_BR_UCN public static final int Conditional_Branch_Instruction = PAPI_BR_CN ; // PAPI_BR_TKN // PAPI_BR_NTK public static final int Mispredicted_Conditional = PAPI_BR_MSP ; public static final int Correctly_Predicted_Conditional = PAPI_BR_PRC ; public static final int FMA_Instruction_Completed = PAPI_FMA_INS ; public static final int Instruction_Issued = PAPI_TOT_IIS ; public static final int Instruction_Completed = PAPI_TOT_INS ; public static final int Integer_Instruction = PAPI_INT_INS ; public static final int Floating_Point_Instruction = PAPI_FP_INS ; public static final int Load_Instruction = PAPI_LD_INS ; public static final int Store_Instruction = PAPI_SR_INS ; public static final int Branch_Instruction = PAPI_BR_INS ; // PAPI_VEC_INS /* public static final int FLOPS = PAPI_FLOPS ; -- removed in 2.745 */ // PAPI_RES_STL // PAPI_FP_STAL public static final int Total_Cycles = PAPI_TOT_CYC ; /* public static final int Instructions_Per_Second = PAPI_IPS ; -- removed in 2.745 */ public static final int Load_Store_Instruction = PAPI_LST_INS ; public static final int Synchronization_Instruction = PAPI_SYC_INS ; public static final int L1_DataCache_Hits = PAPI_L1_DCH ; public static final int L2_DataCache_Hits = PAPI_L2_DCH ; public static final int L1_DataCache_Accesses = PAPI_L1_DCA ; public static final int L2_DataCache_Accesses = PAPI_L2_DCA ; public static final int L3_DataCache_Accesses = PAPI_L3_DCA ; public static final int L1_DataCache_Reads = PAPI_L1_DCR ; public static final int L2_DataCache_Reads = PAPI_L2_DCR ; public static final int L3_DataCache_Reads = PAPI_L3_DCR ; public static final int L1_DataCache_Writes = PAPI_L1_DCW ; public static final int L2_DataCache_Writes = PAPI_L2_DCW ; public static final int L3_DataCache_Writes = PAPI_L3_DCW ; public static final int L1_ICache_Hits = PAPI_L1_ICH ; public static final int L2_ICache_Hits = PAPI_L2_ICH ; public static final int L3_ICache_Hits = PAPI_L3_ICH ; public static final int L1_ICache_Accesses = PAPI_L1_ICA ; public static final int L2_ICache_Accesses = PAPI_L2_ICA ; public static final int L3_ICache_Accesses = PAPI_L3_ICA ; public static final int L1_ICache_Reads = PAPI_L1_ICR ; public static final int L2_ICache_Reads = PAPI_L2_ICR ; public static final int L3_ICache_Reads = PAPI_L3_ICR ; public static final int L1_ICache_Writes = PAPI_L1_ICW ; public static final int L2_ICache_Writes = PAPI_L2_ICW ; public static final int L3_ICache_Writes = PAPI_L3_ICW ; public static final int L1_Cache_Hits = PAPI_L1_TCH ; public static final int L2_Cache_Hits = PAPI_L2_TCH ; public static final int L3_Cache_Hits = PAPI_L3_TCH ; public static final int L1_Cache_Accesses = PAPI_L1_TCA ; public static final int L2_Cache_Accesses = PAPI_L2_TCA ; public static final int L3_Cache_Accesses = PAPI_L3_TCA ; public static final int L1_Cache_Reads = PAPI_L1_TCR ; public static final int L2_Cache_Reads = PAPI_L2_TCR ; public static final int L3_Cache_Reads = PAPI_L3_TCR ; public static final int L1_Cache_Writes = PAPI_L1_TCW ; public static final int L2_Cache_Writes = PAPI_L2_TCW ; public static final int L3_Cache_Writes = PAPI_L3_TCW ; public static final int Float_Multiply_Instruction = PAPI_FML_INS ; public static final int Float_Add_Instruction = PAPI_FAD_INS ; public static final int Float_Divide_Instruction = PAPI_FDV_INS ; public static final int Float_SquareRoot_Instruction = PAPI_FSQ_INS ; public static final int Float_Inverse_Instruction = PAPI_FNV_INS ; public static final int Float_Operations = PAPI_FP_OPS ; /* PAPI3 only */ private static native void PAPI_init(); private static native void PAPI_shutdown(); private static native long PAPI_start(int event); private static native long PAPI_stop(int event, long counterid); private static native int PAPI_checkEvent(int event); private static native int PAPI_avail(); /** * PAPICounter constructor * @param event a PAPI preset event constant */ public PAPICounter(int event) { if (PAPI_avail() == 0){ throw new PAPINotAvailException(); } PAPI_init(); if (!checkEvent(event)){ throw new EventNotAvailException(event); } this.event = event; state = IDLE; accumulated_counter = 0; ownerid = Ti.thisProc(); } /** * returns true if event is available, false otherwise * @param event a PAPI preset event constant */ public static boolean checkEvent(int event){ return PAPI_checkEvent(event) == 1; } /** * Starts the PAPI counter. Can only be called when counter is idle, * otherwise an exception is thrown */ public void start() { if (ownerid != Ti.thisProc()) { throw new CounterNotLocalException(); } if (state == RUNNING){ throw new PAPIException("Can not call start when counter is running"); } counterid = PAPI_start(event); state = RUNNING; } /** * Stops the PAPI counter. Can only be called when counter is running, * otherwise an exception is thrown */ public void stop() { if (ownerid != Ti.thisProc()) { throw new CounterNotLocalException(); } if (state == IDLE){ throw new PAPIException("Can not call stop when counter is idle"); } long value = PAPI_stop(event, counterid); accumulated_counter += value; state = IDLE; } public boolean single running() { return (boolean single)(state == RUNNING); } /** * Clears the accumulated value for the counter. Can only be called * when counter is idle, otherwise an exception is thrown */ public void clear() { if (state == RUNNING){ throw new PAPIException("Can not clear counter when counter is running"); } accumulated_counter = 0; } /** * Returns the accumulated value for the counter. Can only be called * when counter is idle, otherwise an exception is thrown */ public long getCounterValue() { if (state == RUNNING){ throw new PAPIException("Can not get counter value when counter is running"); } return accumulated_counter; } private static void throwTooManyCounterException() { throw new TooManyCounterException(); } private static void throwPAPIException(String local context, String local errstr){ throw new PAPIException(context + " failed with error: " + errstr); } public String toString() { #define outputstring(countername, prestr, poststr) \ case countername: \ return prestr + getCounterValue() + poststr; switch (event) { outputstring(L1_DataCache_Misses,"L1 DataCache Misses ", " ") outputstring(L1_ICache_Misses,"L1 ICache Misses ", " ") outputstring(L2_DataCache_Misses,"L2 DataCache Misses ", " ") outputstring(L2_ICache_Misses,"L2 ICache Misses ", " ") outputstring(L3_DataCache_Misses,"L3 DataCache Misses ", " ") outputstring(L3_ICache_Misses,"L3 ICache Misses ", " ") outputstring(L1_TotalCache_Misses,"L1 TotalCache Misses ", " ") outputstring(L2_TotalCache_Misses,"L2 TotalCache Misses ", " ") outputstring(L3_TotalCache_Misses,"L3 TotalCache Misses ", " ") outputstring(Branch_Unit_Idle,"Branch Unit Idle ", " ") outputstring(Integer_Unit_Idle,"Integer Unit Idle ", " ") outputstring(Float_Unit_Idle,"Float Unit Idle ", " ") outputstring(LoadStore_Unit_Idle,"LoadStore Unit Idle ", " ") outputstring(DataTLB_Misses,"DataTLB Misses ", " ") outputstring(ITLB_Misses,"ITLB Misses ", " ") outputstring(Total_TLB_Misses,"Total TLB Misses ", " ") outputstring(L1_Load_Misses,"L1 Load Misses ", " ") outputstring(L1_Store_Misses,"L1 Store Misses ", " ") outputstring(L2_Load_Misses,"L2 Load Misses ", " ") outputstring(L2_Store_Misses,"L2 Store Misses ", " ") outputstring(Data_Prefetch_Cache_Misses,"Data Prefetch Cache Misses ", " ") outputstring(L3_DataCache_Hits,"L3 DataCache Hits ", " ") outputstring(Memory_Access_Stall,"Memory Access Stall ", " cycles") outputstring(Memory_Read_Stall,"Memory Read Stall ", " cycles") outputstring(Memory_Write_Stall,"Memory Write Stall ", " cycles") outputstring(No_Instruction_Issued,"No Instruction Issued ", " cycles") outputstring(No_Instruction_Completed,"No Instruction Completed ", " cycles") outputstring(Conditional_Branch_Instruction,"Conditional Branch Instruction ", " ") outputstring(Mispredicted_Conditional,"Mispredicted Conditional ", " ") outputstring(Correctly_Predicted_Conditional,"Correctly Predicted Conditional ", " ") outputstring(FMA_Instruction_Completed,"FMA Instruction Completed ", " ") outputstring(Instruction_Issued,"Instruction Issued ", " ") outputstring(Instruction_Completed,"Instruction Completed ", " ") outputstring(Integer_Instruction,"Integer Instruction ", " ") outputstring(Floating_Point_Instruction,"Floating Point Instruction ", " ") outputstring(Load_Instruction,"Load Instruction ", " ") outputstring(Store_Instruction,"Store Instruction ", " ") outputstring(Branch_Instruction,"Branch Instruction ", " ") //outputstring(FLOPS,"FLOPS ", " ") outputstring(Total_Cycles,"Total Cycles ", " cycles") //outputstring(Instructions_Per_Second,"Instructions Per Second ", " ") outputstring(Load_Store_Instruction,"Load Store Instruction ", " ") outputstring(Synchronization_Instruction,"Synchronization Instruction ", " ") outputstring(L1_DataCache_Hits,"L1 DataCache Hits ", " ") outputstring(L2_DataCache_Hits,"L2 DataCache Hits ", " ") outputstring(L1_DataCache_Accesses,"L1 DataCache Accesses ", " ") outputstring(L2_DataCache_Accesses,"L2 DataCache Accesses ", " ") outputstring(L3_DataCache_Accesses,"L3 DataCache Accesses ", " ") outputstring(L1_DataCache_Reads,"L1 DataCache Reads ", " ") outputstring(L2_DataCache_Reads,"L2 DataCache Reads ", " ") outputstring(L3_DataCache_Reads,"L3 DataCache Reads ", " ") outputstring(L1_DataCache_Writes,"L1 DataCache Writes ", " ") outputstring(L2_DataCache_Writes,"L2 DataCache Writes ", " ") outputstring(L3_DataCache_Writes,"L3 DataCache Writes ", " ") outputstring(L1_ICache_Hits,"L1 ICache Hits ", " ") outputstring(L2_ICache_Hits,"L2 ICache Hits ", " ") outputstring(L3_ICache_Hits,"L3 ICache Hits ", " ") outputstring(L1_ICache_Accesses,"L1 ICache Accesses ", " ") outputstring(L2_ICache_Accesses,"L2 ICache Accesses ", " ") outputstring(L3_ICache_Accesses,"L3 ICache Accesses ", " ") outputstring(L1_ICache_Reads,"L1 ICache Reads ", " ") outputstring(L2_ICache_Reads,"L2 ICache Reads ", " ") outputstring(L3_ICache_Reads,"L3 ICache Reads ", " ") outputstring(L1_ICache_Writes,"L1 ICache Writes ", " ") outputstring(L2_ICache_Writes,"L2 ICache Writes ", " ") outputstring(L3_ICache_Writes,"L3 ICache Writes ", " ") outputstring(L1_Cache_Hits,"L1 Cache Hits ", " ") outputstring(L2_Cache_Hits,"L2 Cache Hits ", " ") outputstring(L3_Cache_Hits,"L3 Cache Hits ", " ") outputstring(L1_Cache_Accesses,"L1 Cache Accesses ", " ") outputstring(L2_Cache_Accesses,"L2 Cache Accesses ", " ") outputstring(L3_Cache_Accesses,"L3 Cache Accesses ", " ") outputstring(L1_Cache_Reads,"L1 Cache Reads ", " ") outputstring(L2_Cache_Reads,"L2 Cache Reads ", " ") outputstring(L3_Cache_Reads,"L3 Cache Reads ", " ") outputstring(L1_Cache_Writes,"L1 Cache Writes ", " ") outputstring(L2_Cache_Writes,"L2 Cache Writes ", " ") outputstring(L3_Cache_Writes,"L3 Cache Writes ", " ") outputstring(Float_Multiply_Instruction,"Float Multiply Instructions ", " ") outputstring(Float_Add_Instruction,"Float Add Instructions ", " ") outputstring(Float_Divide_Instruction,"Float Divide Instructiosn ", " ") outputstring(Float_SquareRoot_Instruction,"Float SquareRoot Instructions ", " ") outputstring(Float_Inverse_Instruction,"Float Inverse Instruction ", " ") outputstring(Float_Operations,"Float Operations ", " ") } return "" + getCounterValue(); } }